Superconductive technology has the advantage of being a quantum mechanical phenomenon. Its zero resistance is derived from binding energies on the order of the thermal energy at the material's critical temperature (the temperature at which the metal becomes superconducting). This binding energy sets the highest frequency at which the electromagnetic photon will have enough energy to ``break'' the superconducting paired electrons. This results in frequency ``limitations'' to below a terahertz, or subpicosecond rise time. The power limitation of the devices is set fundamentally by the requirement to store enough energy to exceed adequately thermal noise at the operating temperature (always below its critical temperature). The specific circuit/gate configurations are normally separated into those that switch between a zero voltage state and a voltage state (millivolt level), and those that store and transfer single flux quanta. The first category of circuits have been well developed; the second set are less well established. The second type offers approximately one-tenth the power consumption and higher speed operation.
The limitations imposed upon circuit density are those experienced by
not-yet commercial technologies: insufficient acceptance and therefore
a narrow set of practitioners. The technology is practiced using the
same fabrication techniques as the semiconductor industry uses with the
addition of a different metallization; it is also comprised of many
fewer process steps. The process presently practiced uses 2m
(approximately) lithography which is well below what is common in the
semiconductor industry. Improvements in process control and the use of
high-quality, available, standard fabrication tools should permit
building chips in the 100,000-gate level of complexity.
For a purely superconductive memory chip, complexity is not
expected to exceed the per chip level without changes in the
topology of the storage element. This arises from using the flux
quantum as the stored bit; the required inductance which stores the
zero resistance current, so far, has not been reduced in physical
size. The access time for a modest size chip (
) is
500 picoseconds and has been evaluated to be able to reach 100-200
picoseconds. (NEC believes megabit per chip memories can be done.)