Guided optical interconnects suffer from one of the disadvantages of
electrical interconnects, that is, the need for a physical guiding
medium. This leads to several serious packaging limitations in
applications (e.g., PetaFLOPS computers) requiring a large number of
interconnections. First, only one physical guide can occupy a given
position in space, and second, attaching a large number of guides to an
optoelectronic component is difficult and costly. Free-space optical
interconnects, however, do not require a ``guide''; therefore, a large
degree of spatial multiplexing is possible. For example, a
array of vertical-cavity surface-emitting lasers
(VCSELs) could be used to transmit 10,000 signals simultaneously to an
array of photodiodes in any specified pattern. This can be done far
more compactly than through 10,000 fibers.
The value of free-space interconnection in the PetaFLOPS environment can be appreciated by considering two of the architectural scenarios that have been proposed for such systems. For the scenario of ten thousand 100-GigaFLOPS CPUs, on the order of 100 billion memory accesses per second will be required. Assuming a 64-bit word, this implies a 6,400 gigabytes/sec transfer rate between processor and memory, requiring 64 100-gigabytes/sec optical interconnects. In addition, assuming one of 10 CPU instructions is I/O with a peripheral (implying a 640 gigabytes/sec transfer rate), seven 100-gigabytes/sec fibers would be required. Finally, assuming one of 100 CPU instructions involves communicating with another processor (implying a 64 gigabytes/sec transfer rate), an additional 100-gigabytes/sec link would be required.
If the computer is packaged as 10 MCMs per board, 10 boards per card cage,
and 10 card cages per rack, then assuming a factor of 10 increase in
connectivity from rack-to-card cage-to-board-to-MCM, 64
100-gigabytes/sec connections between processor and memory
(rack-to-rack) implies 640 10-gigabytes/sec links between card cages,
and 6,400 one-gigabyte/sec links between boards, and 64,000
100-megabytes/sec connections between MCMs. Since there are 10,000
CPUs (1 CPU/MCM), the figures translate into
100-gigabytes/sec optical links and
10-gigabytes/sec optical links, a
packaging and manufacturing nightmare. For the architectural scenario
of 100,000 10-GigaFLOPS CPUs, the above reasoning leads to a requirement
for 800,120 100-gigabytes/sec links and 7,000,000 10-gigabytes/sec
links. Free-space implementation does not need a physical guiding
medium for each individual beam, thereby greatly simplifying the
problems in attempting to interconnect such computing systems.
Free-space interconnects have the additional advantage of being reconfigurable en-mass by modifying a beam steering element (e.g., a diffraction grating or hologram) in the media through which the interconnect beams pass. This could lead to special-purpose machines becoming more general purpose, and to computing systems enhancing performance by selecting the interconnection structure most appropriate for the task at hand at any instant of time.