For the purpose of matching the capabilities of optical interconnects with the projected needs of the three proposed architectures, the working group divided each architecture into a plausible packaging hierarchy of integrated circuits (ICs), MCMs (or wafers), boards, card cages, and racks. This is equivalent to dividing the problem into levels of FLOPS that must be processed. For example, for scenario 3, an IC is likely to accommodate 10 CPUs for a total processing capability of 10 GigaFLOPS, an MCM would be about 10 ICs, resulting in 100 GigaFLOPS, etc. Moving up to scenario 2, each IC would likely be a CPU, thus having the same 10 GigaFLOPS capacity as was the case at the IC level for scenario 3. The packaging hierarchy that the working group used is illustrated in Table 5.7, which lists the most promising optical interconnect methodologies recommended by the working group for each level of the packaging hierarchy and for each of the three scenarios. The need for free-space optics at the IC-to-IC and MCM-to-MCM levels will vary depending on the degree of coupling that is desired. For example, for scenario 3, the sheer magnitude of the interconnecting network needed to provide a high degree of coupling among the one million processors will probably necessitate free-space optics.
Note that free-space optics is shown as impacting the processor level
of scenario 1 (where multiple ICs will be needed for each CPU) even
though it was stated earlier that optics had little foreseeable impact
for processors. Free-space optics was included here after receiving
the report of the semiconductor working group that noted the probable
avenue to 100-GigaFLOPS processors was via three-dimensional stacks of
chips with interchip optical interconnects. It is within the reach of
today's technology for a chip 10 mm on a side to be bump bonded to a
optical modulator or laser diode array, providing 10,000
pinouts between adjacent chips in a stack as illustrated in
Figure 5.2. It is projected that within 10 years, the
number of optical pinouts could increase by at least an
order-of-magnitude. Although optics is an integral part of such a processor,
its function is really interconnection rather than processing.
