-- A Performance Estimator for parallel hierarchical memory systems
Overview
Performance estimator PETASIM is aimed at supporting the (conceptual and detailed) design
phases of parallel algorithms, systems software and hardware architecture. Originally this was
designed as a result of the two week long workshops - PAWS and PetaSoft - aimed at understanding hardware and software architectures ten years from now when Petaflop (1015) scale computing can be expected.
PETASIM is aimed at a middle ground - half way between detailed instruction level machine simulation and simple ``back of the envelope'' performance estimates. It takes care of the complexity - memory hierarchy, latencies, adaptivity and multiple program components which make even high level performance estimates hard. It uses a crucial simplification - dealing with data in the natural blocks (called aggregates in HLAM) suggested by memory systems - which both speeds up the performance simulation and in many cases will lead to greater insight as to the essential issues governing performance.
Implementation
A prototype of petaSim performance estimation system has been implemented in NPAC with C++. This demo is constructed with a Java front interface and a back-end C++ petasim performance estimator. You can choose one of the four examples and modify the features of each architecture and application to demonstrate. (The distribution mode is being ingored right now). We will provide a Java version of PetaSim performance estimator later.
URL: http://www/projects/pcrc/petasim/petasim-sc97.html
Contact: Geoffrey C. Fox, Yuhong Wen {gcf,wen}@npac.syr.edu