C258   Contextual Debugging and Analysis of Multi-threaded
       Applications

       M. Bednorz, A. Gwozdowski, and K. Zielinski

       Letter to referees P. Mehrotra (mehra@ptolemy.arc.nasa.gov)
       D. Gannon (gannon@iuvax.cs.indiana.edu), C. Kesselman
       (carl@vlsi.caltech.edu), M. Chen (chen-marina@yale.edu),
       sent 1/21/95.  Comments received from J. Niemiec (3/7/95) -
       accept with changes.


  Abstract
  --------

  (INTRO) The reasons for supporting multiple threads of control fall
into two categories, those motivated by efficient utilization of
multiprocessor hardware and those motivated by application
concurrency.  The both reasons justify an effort to develop
multi-threaded software and put enough impact to force programmers to
rewrite many existing applications.
  As is true of many system services today, the programmers view of
the multiple threas of control service is not always identical to what
the kernel implements.  The software view is created by a combination
of the kernel, run-time libraries, and the compilation system.  This
approach increases the portability of applications and systems, by
hiding some details of implementation, while providing better
performance, by allowing library code to do some work without
involving the kernel.  So the threads library level is the most
interesting for an application programmer.
  .
  .
  .
  The aim of this paper is to present a new concept of a
multi-threaded programs analysis and debugging based on contextual
visualization of the program components that influence threads
execution.....


***


C259   Linear Systolic Array for Spelling Correction

       Stefka Fidanova

       Letter to referees H. T. Kung, R. Thakur, and R. Williams
       (7/23/95).  Comments received from D. Simoni (1/21/95)---
       accept with changes.  **NOTE:  This is my fault.**

  Abstract
  --------

  This paper introduces a linear systolic array for spelling
correction.  The high regularity of the systolic array has been
exploited for investigating a design methodology based on the automated
generation of a representative subcircuit.


***


C260   Parallel Generation of Adaptive Multiresolution Structures
       for Image Processing

       Xi Li, Sotirios G. Ziavras, and Constantine N. Manikopoulos

       Letter to referees R. Battiti (returned), W. Furmanski
       (furm@npac.syr.edu) sent 1/21/95.


  Abstract
  --------
  
  In this paper, we present an algorithm for creating
region-adjacency-graph (RAG) pyramids on TurboNet, an experimental
parallel computer system.  each level of these hierarchies of
irregular tessellations is generated by independent stochastic
processes that adapt the structure of the pyramid to the content of
the image.  RAG can be used in multiresolution image analysis to
extract connected components from labeled images.  The implementation
of the algorithm is discussed and performance results are presented
for three different communication techniques which are supported by
TurboNet's hybrid architecture.  The results indicate that efficient
communication is vital to good performance of the algorithm.